MCC Melody Clock PLIB

Changelog

All notable changes to this project will be documented in this file.

[1.4.5] - 2025-12-15

Bug Fixes

• CC16SCRIP-10204 :- Register View updates for displaying correct setting bit values

[1.4.4] - 2025-10-28

New Features

• CC16SCRIP-10132 :- Performance Improvement

[1.4.3] - 2025-09-09

New Features

• CC16SCRIP-10015 :- Applied MISRA rule fixes and warning suppressions to PLIB
• CC16SCRIP-9844 :- dsPIC33C in Clock_Initialize, change the clock source to FRC if current clock source is PLL derived source before updating PLL registers

[1.4.2] - 2023-04-05

Bug Fixes

• CC16SCRIP-6495 :- Clock PLIB 1.4.x ClockOut Config bit 'ON' when OSC2 pin set to Output
• CC16SCRIP-6322 :- Clock source with PLL :: Requesting frequency less than 4 MHz miscalculates FOSC to 80 MHz

[1.4.1] - 2023-03-21

Bug Fixes

• CC16SCRIP-6729 :- "-dev" tag in the public release of clock plib v1.4.0
• CC16SCRIP-6472 :- Incorrect Auxiliary clock configuration
• CC16SCRIP-6468 :- Incorrect AFPLL calculation of CLOCK module in MCC Melody
• CC16SCRIP-6440 :- Incorrect POSCMD value configured when external oscillator is selected as clock source

[1.4.0] - 2023-01-30

New Features

• CC16SCRIP-6058 :- Clock Input Frequency Max Value needs correction - Primary Osc with PLL

Bug Fixes

• CC16SCRIP-6031 :- The OSCIOFNC bit it always set to ON even in primary oscillator mode
• CC16SCRIP-5296 :- Reference clock output is enabled on the pin at initialization
• CC16SCRIP-5295 :- Reference clock SFRs are not configured to their POR default values at initialization
• CC16SCRIP-5294 :- Primary Oscillator with PLL oscillator configuration not supported at initialization
• CC16SCRIP-5293 :- APLLDIV1 is not being set to its POR value of 0x0041
• CC16SCRIP-4761 :- Clock - Can't go back from Primary HS mode(10 to 32MHz range) to XT mode(3.5 to 10MHz range)
• CC16SCRIP-4749 :- System frequency not getting calculated for FRC with Postscalar

[1.3.0] - 2022-06-30

New Features

• CC16SCRIP-4021 :- Allow the user to set maximum system frequency through user interface

Bug Fixes

• CC16SCRIP-4759 :- Auxiliary Clock comments should not generate in generated code for Apollo - FTL fix

[1.2.1] - 2022-05-26

New Features

• CC16SCRIP-2045 :- Dependency module names updated in builder view

[1.2.0] - 2022-03-10

Bug Fixes

• CC16SCRIP-3176 :- Minimum and Maximum clock range added for input clock frequency and requested clock frequency

[1.1.0] - 2022-02-07

New Features

• CC16SCRIP-3609 :- Updates to support Bootloader Requirement

[1.0.1] - 2022-01-17

New Features

• CC16SCRIP-3420 :- Updates to make PLIB compatible with range of versions of System Modules(Clock/Interrupt/PIN)